1. Field of the Invention
This invention generally relates to a capacitor, a manufacturing method thereof, and an electronic substrate including the capacitor, and more particularly to a capacitor which is appropriate for a decoupling capacitor, a manufacturing method of the capacitor, and an electronic substrate including the capacitor.
2. Description of the Related Art
In recent years, in semiconductor integrated circuit devices including microprocessors, improvements for increased operating speed and reduced power consumption are advanced. In order to stabilize operation of a semiconductor integrated circuit device in high frequency areas in GHz bands, at low voltage, it is important to control change of the power supply voltage due to a rapid change of the load impedance, and to remove high frequency noises of the power supply.
In a conventional semiconductor package substrate, a decoupling capacitor which is a type of the multi-layered ceramic capacitor (MLCC) is mounted in the vicinity of a semiconductor integrated circuit device, in order to prevent the change of the power-supply voltage and avoid a malfunction of the semiconductor integrated circuit device due to high frequency noises superimposed on a power-supply line and a ground line.
It is desired that, as the characteristics needed for a decoupling capacitor, the decoupling capacitor has both a large amount of capacitance and a reduced inductance in high frequency areas.
FIG. 1 shows the composition of a conventional thin-film capacitor. As shown in FIG. 1, the thin-film capacitor 100 has a thin-film dielectric layer 103, constituting the capacitor, which is proposed for an increased amount of capacitance.
The thin-film capacitor 100 is manufactured through a thin-film fabrication process using a vacuum system. In the thin-film fabrication process, a lower electrode 102, a dielectric layer 103, and an upper electrode 104 are deposited on a supporting substrate 101 which is made of, for example, silicon.
Since performing a micro fabrication using dry etching is possible for the thin-film capacitor 100, it is possible to make small the wiring length between the lower electrode or the upper electrode and the terminal 105, and the distance between the terminals. Thus, this thin-film capacitor 100 can be formed into a capacitor having low inductance structure. For example, see Japanese Laid-Open Patent Application No. 2004-214589.
On the other hand, conventionally, a solid electrolytic capacitor is used as a capacitor which has a large capacitance. In the case of the solid electrolytic capacitor, it is difficult to make small the distance between the terminals and the wiring length due to the structure thereof. It is likely that the equivalent series inductance (ESL) increases. And the solid electrolytic capacitor does not function as a decoupling capacitor which is able to operate fully in high frequency areas. There is proposed a solid electrolytic capacitor which is adapted for reducing the ESL or the ESR. For example, see Japanese Laid-Open Patent Application No. 2005-012084.
However, the thin-film capacitor 100 as disclosed in Japanese Laid-Open Patent Application No. 2004-214589 has to use an expensive vacuum thin-film forming system, such as a sputtering equipment, as the indispensable installation for forming the lower electrode 102, the upper electrode 104, and the dielectric layer 103. For this reason, the manufacturing cost is increased.
Moreover, the lower electrode 102 and the upper electrode 104 are very thin films on the order of several hundreds nanometers, and it is necessary to use noble metals, such as Pt and Au, which are hard to be oxidized. For this reason, the material cost is also increased. In addition, since the thin films are likely to be short circuited due to inclusion of foreign bodies, such as particles, performing a clearing process for surface improvement may be needed for the yield enhancement. Because of the above factors, it is difficult to attain low-cost manufacturing of the thin-film capacitor.
The solid electrolytic capacitor as disclosed in Japanese Laid-Open Patent Application No. 2005-012084 has a complicated structure. For this reason, the manufacturing processes are complicated, and it is difficult to attain low-cost manufacturing of the solid electrolytic capacitor.